Intel Claims Its 32 Core, Intel has released new performance numbers of its next-generation Ice Lake-SP Xeon Platinum CPUs, comparing it against AMD’s 2nd Generation EPYC Rome CPUs. According to Intel, Ice Lake Xeon CPUs with their updated core architecture will deliver an 18% IPC jump over previous-gen Cascade Lake Xeon CPUs, allowing them to be competitive against AMD’s high-core count CPU offerings.
Intel Teases 32 Core Ice Lake-SP Xeon CPU Beating A 64 Core AMD EPYC Rome CPU But There’s A Catch, Intel Claims Its 32 Core, Within the SC20 presentation, Intel reassured its partners and customers that Ice Lake-SP Xeon CPUs (3rd Gen Scalable Processor Family) is on track for volume ramp in Q1 2021 followed by a formal launch sometime around mid-2021. The Intel Ice Lake-SP generation of Xeon CPUs will be utilizing a 10nm process node along with a brand new microarchitecture and a new platform to support increased memory bandwidth.
We know that Ice Lake-SP Xeon CPUs will be using the Sunny Cove core architecture which offers an 18% IPC uplift over Skylake so based on that, Intel claims that it is looking to deliver better perf per core, more memory channels for increased bandwidth, full PCIe Gen 4.0 support and up to 6 TB of memory support per socket (Intel Optane PMem).
As for the performance benchmarks versus AMD’s 64 Core EPYC 7742 CPU, Intel claims that its 32 core Ice Lake-SP Xeon CPU can deliver up to 30% faster performance in key life sciences and FSI workloads. The performance was measured within NAMD STMV, Monet Carlo, and LAMMPS. The Intel Xeon Ice Lake-SP CPU was configured with 32 cores and 64 cores per socket. The actual run used two Ice Lake-SP Xeon CPUs for a total of 64 cores and 128 threads versus two AMD EPYC 7742 Rome CPUs with a total of 128 cores and 256 threads.
The Intel Ice Lake-SP lineup would be directly competing against AMD’s enhanced 7nm based EPYC Milan lineup which will feature the brand new 7nm Zen 3 core architecture which offers a huge 19 percent uplift in IPC over the original Zen core.
Source : wccftech